View ICS448-16_223761.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ICS448-16
Networking Clock Synthesizer
Description
The ICS448-16 generates four high-quality, high-frequency clock outputs. It is designed to replace multiple crystals and crystal oscillators in networking applications. Using ICS' patented Phase-Locked Loop (PLL) techniques, the device runs from a 25 MHz crystal or clock input.
Features
* * * * * *
Packaged in 16-pin TSSOP Replaces multiple crystals and oscillators Input crystal or clock frequency of 25 MHz Zero ppm frequency synthesis error Fixed output frequencies of 25 MHz and 48 MHz Selectable output frequencies of 24 MHz, 48 MHz, 50 MHz and 66.6666 MHz
* Duty cycle of 45/55 * Operating voltage of 3.3 V * Advanced, low power CMOS process
Block Diagram
VDD 3 SEL PLL1 CLK1
PLL2
CLK2
X1 25 MHz clock or crystal input X2
Crystal Oscillator/ Clock Buffer
PLL3
48M 25M
External capacitors may be required.
4 GND PDTS (all outputs and PLLs)
MDS 448-16 E I n t e gra te d C i r c u i t S y s t e m s
1
5 25 Race Stre et, San Jo se, CA 9 5126
Revision 031605 te l (40 8) 2 97-12 01
w w w. i c st . c o m
ICS448-16 Networking Clock Synthesizer
Pin Assignment
X1 GND S0 CLK1 VDD GND 48M CLK2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 X2 VDD PDTS S1 VDD GND 25M VDD
Output Select Table (MHz)
S1 0 0 1 1 S0 0 1 0 1 CLK1 50 66.6666 50 66.6666 CLK2 48 48 24 24
16-pin (173 mil) TSSOP
Pin Descriptions
Pin Number
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Pin Name
X1 GND S0 CLK1 VDD GND 48M CLK2 VDD 25M GND VDD S1 PDTS VDD X2
Pin Type
XI Power Input Output Power Power Output Output Power Output Power Power Input Input Power XO Connect to ground.
Pin Description
Crystal input. Connect this pin to a crystal or external clock source. Select pin 0. Internal pull-up resistor. Selectable output clock. See table above. Weak internal pull-down when tri-state. Connect to voltage supply. Connect to ground. 48 MHz output clock. Weak internal pull-down when tri-state. Selectable output clock. See table above. Weak internal pull-down when tri-state. Connect to voltage supply. 25 MHz output clock. Weak internal pull-down when tri-state. Connect to ground. Connect to voltage supply. Select pin 1. Internal pull-up resistor. Power down tri-state. Powers down entire chip and tri-states outputs when low. Internal pull-up resistor. Connect to voltage supply. Crystal output. Connect this pin to a crystal. Float for clock input.
MDS 448-16 E In te grated Circuit Systems
2
525 Ra ce Street, San Jose, CA 9512 6
Revision 031605 tel (4 08) 297-1 201
w w w. i c s t . c o m
ICS448-16 Networking Clock Synthesizer
External Components
Decoupling Capacitor
As with any high-performance mixed-signal IC, the ICS448-16 must be isolated from system power supply noise to perform optimally. A decoupling capacitor of 0.01F must be connected between each VDD and the PCB ground plane.
PCB Layout Recommendations
For optimum device performance and lowest output phase noise, the following guidelines should be observed. 1) The 0.01F decoupling capacitors should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between the decoupling capacitors and VDD pins. The PCB trace to VDD pins should be kept as short as possible, as should the PCB trace to the ground via. 2) The external crystal should be mounted just next to the device with short traces. The X1 and X2 traces should not be routed next to each other with minimum spaces, instead they should be separated and away from other traces. 3) To minimize EMI, the 33 series termination resistor (if needed) should be placed close to the clock output. 4) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers. Other signal traces should be routed away from the ICS448-16. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device.
Series Termination Resistor
Clock output traces over one inch should use series termination. To series terminate a 50 trace (a commonly used trace impedance), place a 33 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20.
Crystal Load Capacitors
The device crystal connections should include pads for small capacitors from X1 to ground and from X2 to ground. These capacitors are used to adjust the stray capacitance of the board to match the nominally required crystal load capacitance. Because load capacitance can only be increased in this trimming process, it is important to keep stray capacitance to a minimum by using very short PCB traces (and no vias) between the crystal and device. Crystal capacitors must be connected from each of the pins X1 and X2 to ground. The value (in pF) of these crystal caps should equal (CL -6 pF)*2. In this equation, CL= crystal load capacitance in pF. Example: For a crystal with a 16 pF load capacitance, each crystal capacitor would be 20 pF [(16-6) x 2] = 20.
MDS 448-16 E In te grated Circuit Systems
3
525 Ra ce Street, San Jose, CA 9512 6
Revision 031605 tel (4 08) 297-1 201
w w w. i c s t . c o m
ICS448-16 Networking Clock Synthesizer
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS448-16. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature 7V
Rating
-0.5 V to VDD+0.5 V 0 to +70C -65 to +150C 125C 240C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature Power Supply Voltage (measured in respect to GND)
Min.
0 +3.135
Typ.
+3.3
Max.
+70 +3.465
Units
C V
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V 5%, Ambient Temperature 0 to +70C
Parameter
Operating Voltatge Supply Current Power Down Current Input High Voltage Input Low Voltage Output High Voltage Output High Voltage Output Low Voltage Short Circuit Current Input Capacitance, Inputs Nominal Output Impedance Internal Pull-down Resistor Internal Pull-up Resistor
Symbol
VDD IDD IDDPD VIH VIL VOH VOH VOL IOS CIN ZOUT RPD RPU
Conditions
No load, PDTS=1 No load, PDTS=0
Min.
3.135
Typ.
3.3 30 50
Max.
3.465
Units
V mA A V
2 0.8 IOH = -4 mA IOH = -12 mA IOL = 12 mA Clock outputs 70 5 20 Clock outputs S1, S0, PDTS pins 500 360 VDD-0.4 2.4 0.4
V V V V mA pF k k
MDS 448-16 E In te grated Circuit Systems
4
525 Ra ce Street, San Jose, CA 9512 6
Revision 031605 tel (4 08) 297-1 201
w w w. i c s t . c o m
ICS448-16 Networking Clock Synthesizer
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V 5%, Ambient Temperature 0 to +70C
Parameter
Input Frequency Output Rise Time Output Fall Time Output Clock Duty Cycle Absolute Clock Period Jitter Frequency Synthesis Error Startup Time Output Enable Time Output Disable Time
Symbol
fIN tOR tOF
Conditions
20% to 80%, Note 1 80% to 20%, Note 1 at VDD/2, Note 1 Note 1 All clock outputs
Min.
Typ.
25 1 1
Max. Units
MHz ns ns 55 % ps ppm 2 ms s ns
45
50 150 0 1 20 2
tOE tOD
PDTS high to output locked to 1% PDTS low to tri-state
Note 1: Measured with a 15 pF load.
Thermal Characteristics
Parameter
Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case
Symbol
JA JA JA JC
Conditions
Still air 1 m/s air flow 3 m/s air flow
Min.
Typ.
78 70 68 37
Max. Units
C/W C/W C/W C/W
Marking Diagram
16 9
448R-16 ###### YYWW
1
Notes: 1. ###### is the lot code. 2. YYWW is the last two digits of the year, and the week number that the part was assembled.
8
MDS 448-16 E In te grated Circuit Systems
5
525 Ra ce Street, San Jose, CA 9512 6
Revision 031605 tel (4 08) 297-1 201
w w w. i c s t . c o m
ICS448-16 Networking Clock Synthesizer
Package Outline and Package Dimensions (16-pin TSSOP, 173 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
16
Millimeters Symbol Min Max
Inches Min Max
Index Area
IN D EX AR EA
E1
E
E
H
1
2
Pin 1
DD
A A1 A2 b C D E E1 e L aaa
-1.20 0.05 0.15 0.80 1.05 0.19 0.30 0.09 0.20 4.90 5.1 6.40 BASIC 4.30 4.50 0.65 Basic 0.45 0.75 0 8 -0.10
-0.047 0.002 0.006 0.032 0.041 0.007 0.012 0.0035 0.008 0.193 0.201 0.252 BASIC 0.169 0.177 0.0256 Basic 0.018 0.030 0 8 -0.004
A 2 A 1
A
c
a
e
-C-
c e
b
A L
L
b
S E A T IN G P LA N E
aaa C
Ordering Information
Part / Order Number
ICS448G-16 ICS448G-16T
Marking
See page 5
Shipping Packaging
Tubes Tape and Reel
Package
16-pin TSSOP 16-pin TSSOP
Temperature
0 to +70 C 0 to +70 C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 448-16 E In te grated Circuit Systems
6
525 Ra ce Street, San Jose, CA 9512 6
Revision 031605 tel (4 08) 297-1 201
w w w. i c s t . c o m
ICS448-16 Networking Clock Synthesizer
Revision History
Rev.
C
Originator
P.Griffith
Date
09/23/04
Description of Change
Added "weak internal pull-down when tri-state" to pins 4 and 8; removed "Ambient Operating Temperture" from Max Ratings; removed "Operating Voltage" from DC chars; updated Supply/PowerDown current and internal pul-down resistor values in DC chars; updated Output rise/fall and enable/disable times and Startup time from AC chars. Changed package designator on Part Number Ordering info from "R" to "G". Released to Final and from custom to standard, general purpose device.
D E
R. Wei P.Griffith
10/19/04 03/16/05
MDS 448-16 E In te grated Circuit Systems
7
525 Ra ce Street, San Jose, CA 9512 6
Revision 031605 tel (4 08) 297-1 201
w w w. i c s t . c o m

▲Up To Search▲

Price & Availability of ICS448-16

	To Download ICS448-16 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .